Intel Unveils New Chip Packaging

Tuesday, October 9th 2001, 12:00 am

By: News On 6

SAN JOSE, Calif. (AP) _ In another step toward smaller yet more powerful computer processors, Intel Corp. has developed a new packaging technology that links the tiny chips to the rest of the world.

The advance is a necessary step before computers running at 20 gigahertz with a billion transistors ever land in computer stores or office desktops, said Gerald Marcyk, director of Intel's Components Research Lab.

``We need to make sure the performance of that microprocessor engine is matched with the performance of packaging,'' he said. ``It would be like sticking a high-performance engine in a compact car.''

Intel was to present the technical details of Bumpless Build-Up Layer packaging at the Advanced Metallization Conference in Montreal on Monday.

A silicon chip's packaging is a critical element: It delivers power and transfers data to and from the motherboard. It also protects the sensitive material from the environment and draws away heat.

Intel's current crop of chips are connected to the rest of the world with solder bumps. Electrical connections with the bumps are made through a copper-laced plastic-like substance, which itself is connected to pins.

In the new packaging, the silicon die is embedded into the package core, alleviating the need for the solder bumps and cutting the depth of the entire package in half.

Because electrons do not have to travel as far, BBUL results in higher performance and lower power consumption.

``What's going to happen with this power is that you're going to be using it for processing images and speech in the way that you process words and numbers today,'' Marcyk said.

Intel's flagship Pentium 4 processor has about 42 million transistor and currently runs at the top speed of 2 gigahertz.

Researchers are now exploring methods of transferring the technology to Intel's high-volume production lines. BBUL is expected to be included in the chip-making giant's products in 2005 or 2006.